• RFID

Telecom Chip module THD89 1280K Tongxin China supply

This product is the first chip in China receiving the CC EAL6 + certification.

Adopting the world’s advanced manufacturing process, it boasts of such features as high security, high reliability, low power consumption, multiple interfaces, large capacity. The product is ideal for secure payment, smart watch, and smart home, unattended operation, blockchain, loT and others.

 

 

 


 

Contact Us Now for Free Samples !!!

 

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Product Detail

Product Tags

Features

CPU
√    High-performance 32-bit core
√    Little-endian
√    3-stage pipeline
√    CPU operating clock could be configured
- Internal clock: from 1 to 32 division
Memory
NVM
√    Size: 1280 KB
√    Page size: 512 bytes
√    Erase and program operation:
- 512 bytes page erasing
- Double word align, one or more double words programming in the
same half page(64 bits as unit)
√    Typical time:
- Page Erasing 3ms, Page Fast Erasing 0.9ms
- Double word Programming 45 μs
√    Bit logic:
- 1b after erasing (physically)
- 0b after programming
√    Usage: data and code
RAM
√    Size: 44KB
- General RAM: 40 KB
- PKE RAM: 4 KB, CPU accessible
ROM
√    Size: 48 KB
- Pre-load Bootloader ,basic operation lib and PKE Lib
OTP
√    SN: 17 bytes
√   UID: 10 bytes
Algorithms and Peripherals
Symmetric algorithms
√   DES/T-DES
√   AES
√   SM1
√   SM4
√   SM7
√   SSF33
Asymmetric algorithms
√   RSA(support 4096 bits)
√   ECC
√   SM2
√   SM9
Digest algorithms
√   SHA1
√   SHA256
√   SHA512
√   SM3
Peripherals
√   CRC:   16-bit CRC-CCITT and 32-bit CRC
√   TRNG:    True Random Number Generator, for secure transactions
√   Timer:    Three 16-bit Timers(independent clock source), one ETU timer(external clock source)
Interface
ISO/IEC 7816-3 serial interface
√   UART supporting ISO/IEC 7816-3 T=0/T=1 protocol and 11 baud rates:
F/D = 11H, 12H, 13H, 18H, 91H, 92H, 93H, 94H, 95H, 96H, 97H
√   Interface DMA implemented
√   Dedicated ETU Counter for transmitting Null byte (e.g., 60H) automatically
√   Transmitting TS byte ofATR (3BH) automatically
√   Support GSM power consumption standards, including Clock Stop mode
SWP
√   Compliant with ETSI TS 102 613 (V11.0.0)
√   Interface DMA implemented
√   Communication automatically during ACT stage
GPIO
√   7 GPIOs
√   Multiplexed with SPI interface
√   Trigger by edge and level
SPI
√   Supported master and slave mode
√   Interface DMA implemented
√   Max speed 8Mbps for master
√   Max speed 10Mbps for slave
I2C
√   Supported master and slave mode
√   Standard transfer rates(100 Kbps ~ 400Kbps)
√   7-bit I2C address
√   Interrupt supported
√   Buffer of transmit and receive can is sepereated and each buffer store one byte everytime
UART
√   Asynchronous mode to interface UART
√   Optional transmit and receive FIFOs
√   Support standard baud rates, up to 2.5Mbps
Security
√   WDT (Watch Dog Timer)
√   Scrambling , redundancy data storage
√   Logic redundancy
√   External high and low voltage detectors
√   Internal high and low voltage detectors
√   High and low external clock frequency detectors(ISO/IEC 7816 external clock)
√   Clock filter(ISO/IEC 7816 external clock)
√   Low internal clock frequency detectors
√   Light detector
√   Temperature detector
√   Active shield
√   Security Certification Targeted: CC EAL5+, EMVCo, BCTC
Work parameters (Note1)

Symbol Name Conditions Min Typical Max Unit
TDES Time for Executing 64-bit

DES Encryption

    235   Cycle
TSE Time for Erasing a Page   2 3 4 ms
Time for Erasing a Page(fast)   0.8 0.9 1 ms
TSP Time for Program a Double Word   37.5 45 53 μs
Time for Program half Page   1.3 1.45 1.6 ms
TDR Data Retention   12     year
NSE Page Endurance     500000   Cycle
fEXT External Clock Freq.   1   10 MHz
VCC Supply Voltage   1.62   5.5 V
ICC Supply Current

(Note2)

VCC= 5.0V     10 mA
VCC= 3.0V     6 mA
VCC= 1.8V     4 mA
ISB Standby Current

(Clock Stop)

VCC= 5.0V     200 μA
VCC= 3.0V     100 μA
VCC= 1.8V     100 μA
TAMB Ambient Temperature   -40   105 °C
VESD ESD Protection HBM 4     kV

√   Note1:This document is a preliminary version, data and descriptions (including this table) cannot be
a formal evidence for performance and functions of the IC.
√   Note2: When operating only at ISO7816 interface without executing algorithm.

Descriptions

The THD89 1.0.1-M is a series of 32-bit CPU security chip, with NVM, voltage and clock frequency detectors,and functional modules like DES/T-DES, RSA, RNG, CRC, etc.
Compared with similar products in the world’s industry, the THD89 series products distinguish themselves in high performance, high security, high endurance, cost-effectiveness, and low power consumption.

Structure

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Development Toolkits

√   ULINK2 Emulator
√   TMC Target board
√   Demo project with API(Application Programming Interface)
√   User Manual and Application Notes
√   The UDVG software tool to generate COS downloading script with customized format

Package and Pin Definitions

Different packages are available, e.g., wafer / module / card, etc.
Listed are pin definitions for a card package.

Signal Name Function Descriptions Contact defined in ISO/IEC 7816-2
VCC Power Supply Voltage C1
GND Ground C5
CLK Clock Input C3
RST Reset Signal C2
I/O Data Input/Output C7
SWP SWIO contact C6
NC Not Connected C4、C8

Pin Definitions:

Number Name Description
1 VCC VCC
2 GND GND
3 CLK Contact card (ISO7816 slave) interface clock signal
4 RST Contact card (ISO7816 slave) interface reset signal
5 SIO Contact card (ISO7816 slave) interface data signal
6 SWIO SWP IO
7 GPIO0 GPIO0/SPI_MOSI/UARTTX/SPI_SCK
8 GPIO1 GPIO1/SPI_MISO/UARTRX/SPI_SSN
9 GPIO2 GPIO2/SPI_CLK/ I2C_SCL/SPI_MOSI
10 GPIO3 GPIO3/SPI_SSN/I2C_SDA/SPI_MISO
11 GPIO4 GPIO4/I2C_SCL/UARTTX/SWD_CLK
12 GPIO5 GPIO5/I2C_SDA/UARTRX/SWD_SIO
13 GPIO6 GPIO6

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